Field of the Invention
The present invention relates to an imaging device. Priority is claimed on Japanese Patent Application No. 2013-186470, filed Sep. 9, 2013, the content of which is incorporated herein by reference.
Description of Related Art
Various processes are performed on a signal (hereinafter referred to as a “pixel signal”) of each pixel output from a solid-state imaging device provided in an imaging device in photographing in an imaging device such as a digital camera. These processes include a process of forming an image captured by the solid-state imaging device, a process of performing control related to photographing by the imaging device, etc. In general, the solid-state imaging device performs raster scanning and sequentially outputs pixel signals in a horizontal direction (lateral direction) for an image.
Thus, an image-processing device provided in an imaging device and configured to process a pixel signal output by the solid-state imaging device is provided with a line memory configured to temporarily store pixel signals of the horizontal direction output by the solid-state imaging device in a number of rows necessary for image processing.
In recent imaging devices, the number of pixels of the solid-state imaging device has increased with a change to high resolution of an image to be captured and the number of pixels of the horizontal direction of the solid-state imaging device is also increasing year by year. Thus, in the image-processing device, a storage capacity of the line memory also increases according to the number of pixels of the horizontal direction in which image processing is performed. An increase in the storage capacity of the line memory in the image-processing device becomes a factor which increases a circuit scale of the imaging device.
Therefore, for example, as disclosed in Japanese Patent No. 4179701, technology of an image-processing device for performing image processing on one image through a plurality of separate operations is disclosed. In the technology disclosed in Japanese Patent No. 4179701, a pixel signal output from the solid-state imaging device is temporarily stored in a frame memory provided outside the image-processing device and then one image is generated through a plurality of image-processing operations while pixel signals necessary for the processing are read from the frame memory. For example, in the technology disclosed in Japanese Patent No. 4179701, as illustrated in FIG. 10, the entire region of one image is divided into two regions, image processing is performed on a half region of one side (left) in first image processing, and image processing is performed on a half region of the other side (right) in the second image processing. As described above, in the technology disclosed in Japanese Patent No. 4179701, one image is divided into a plurality of blocks and image processing is performed through operations equal in number to the division blocks, so that one image can be generated in the storage capacity of the line memory which is less than the number of pixels of the horizontal direction in which the solid-state imaging device performs an output operation.
In addition, for example, as disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-135410, technology of an evaluation value-generating device for generating an evaluation value for enabling an imaging device to control photographing based on image data after image processing is disclosed. In the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-135410, it is possible to generate an evaluation value based on a pixel signal output from the solid-state imaging device in real time and generate an evaluation value based on an element other than a pixel signal input in real time by reading image data after image processing stored in the storage unit. For example, in the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-135410, it is possible to re-store a combined image obtained by combining images in the storage unit while storing a plurality of images obtained by changing an exposure condition of the solid-state imaging device in the storage unit and generate an evaluation value based on the combined image re-stored in the storage unit.
In this manner, the image-processing device provided in the imaging device performs a process of forming an image or a process to control photographing while accessing a frame memory or a memory such as a storage unit storing an image as in the technology disclosed in Japanese Patent No. 4179701 or the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-135410.
Incidentally, a plurality of functional blocks for performing processes according to functions are provided in the imaging device to implement various functions to be performed by the imaging device. In this imaging device, a configuration is well-known in which each functional block uses the same memory as that used when the image-processing device performs a process. That is, in such imaging device, a configuration in which one memory is shared by an image-processing device and a plurality of functional blocks (hereinafter referred to as “processing blocks” when the image-processing device and the plurality of functional blocks are represented without distinction) is commonly adopted. Thus, in the imaging device, there is a configuration in which the memory shared by the processing blocks is also connected to a data bus to which the plurality of processing blocks provided in the imaging device are connected. Then, each processing block accesses the memory via the data bus. Thus, data read from the memory through each processing block and data written to the memory through each processing block all pass through the data bus.
The timing at which each processing block performs a process differs according to each operation in the imaging device. In addition, a bus bandwidth representing an amount of data passing through the data bus when each processing block accesses the memory differs according to a process to be performed by each processing block. Thus, for example, when access from a plurality of processing blocks to the memory occurs within the same period, data flowing through the data bus is concentrated in this period and pressure is imposed on the bus bandwidth. Due to this, in the imaging device, it is important to secure a necessary bus bandwidth when each processing block performs a process.
Then, for example, as disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-199880, technology of an imaging device for leveling an amount of data on a data bus is disclosed. In the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-199880, the amount of data on the data bus is temporally equalized and leveled to prevent data from concentrating in a partial period by setting the speed at which the processing block outputs the data to the data bus to a slow speed with respect to a speed at which data is input to the processing block. Thereby, in the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-199880, the pressure on the bus bandwidth of the data bus in the imaging device can be suppressed and the data bus can be efficiently used.
A configuration used to flatten the amount of data on the data bus is a configuration that delays the output of the data that is input earlier, that is, a configuration as a buffer to absorb the time difference between the input and output of the data is necessary. In the technology disclosed in Japanese Unexamined Patent Application, First Publication No. 2010-199880, a configuration to absorb a time difference between the input and output of the data is disclosed as a memory which stores (writes) the input data temporarily and outputs (reads out) the stored data in accordance with the timing when the data is output to the data bus. Regarding the capacity of the memory serves as the buffer to absorb the time difference between the input and output of the data, it is known that the bigger the time difference between the input and output of the data is, the more the required memory is.